• S-T. Wang, H. Xu, A. Mamandipoor, R. Mahapatra, B. H. Ahn, S. Ghodrati, K. Kailas, M. Alian, H. Esmaeilzadeh, Data Motion Acceleration: Chaining Cross-Domain Multi Accelerators, 30th IEEE International Symposium on High-Performance Computer Architecture (HPCA 2024), p.1043-1062, March, 2024.
  
  
• Philip G. Emma, Alper Buyuktosunoglu, Michael B. Healy, Krishnan Kailas, Valentin Puente, Roy Yu, Allan Hartstein, Pradip Bose, Jaime H. Moreno, 3D stacking of high-performance processors, 20th IEEE International Symposium on High Performance Computer Architecture (HPCA 2014), p.500-511, February, 2014. abstract
  
  
• Krishnan Kailas, Viresh Paruthi, Brian Monwai, Formal Verification of Correctness and Performance of Random Priority-based Arbiters, 9th International Conference on Formal Methods in Computer-Aided Design (FMCAD 2009), p.101-107, November, 2009. abstract
  FMCAD presentation slides
  
  
• Ashwin Swaminathan, Yinian Mao, Min Wu, Krishnan Kailas, Data Hiding in Compiled Program Binaries for Enhancing Computer System Performance, 7th International Workshop on Information Hiding (IH 2005), Lecture Notes in Computer Science Vol. 3727, Springer, p.357-371, June 2005.
  
  
• J.H. Moreno, V. Zyuban, U. Shvadron, F. Neeser, J. Derby, M. Ware, K. Kailas, A. Zaks, A. Geva, S. Ben-David, S. Asaad, T. Fox, M. Biberstein, D. Naishlos, H. Hunter, An innovative low-power high-performance programmable signal processor for digital communications, IBM Journal of Research and Development, Vol. 47, No. 2/3, p. 299-326, March/May, 2003.
  
  
• Krishnan Kailas, Manoj Franklin, Kemal Ebcioglu, A Partitioned Register File Architecture and Compilation Scheme for Clustered ILP Processors, 8th International Euro-Par Conference (Euro-Par 2002), Lectures Notes in Computer Science, Vol. 2400, Springer-Verlag, p.500-511, August, 2002.
  
  
• Krishnan Kailas, Microarchitecture and Compilation Support for Clustered Instruction-level Parallel Processors, Ph.D. Dissertation, March 2001. abstract.
  
  
• Krishnan Kailas, Kemal Ebcioglu, Ashok Agrawala, CARS: A New Code Generation Framework for Clustered ILP Processors, Proc. of the 7th International Symposium on High Performance Computer Architecture (HPCA-7), p.133-143, January, 2001.
  HPCA presentation slides
  UMIACS technical report version: UMIACS-TR-2000-55, July 2000.
  
  
• Krishnan Kailas, Ashok Agrawala. An Accurate Time-Management Unit for Real-Time Processors, Proc. of 8th International Conference on Advance Computing and Communications (ADCOM 2000), p.79-86, December 2000.
  
  
• Kemal Ebcioglu, Jason Fritts, Stephen Kosonocky, Michael Gschwind, Erik Altman, Krishnan Kailas, Terry Bright, An Eight Issue Tree-VLIW Processor for Dynamic Binary Translation, Proc. of International Conference on Computer Design ICCD'98, p.488-495, October 1998.

Technical Reports

• Rajiv Ravindran, Krishnan Kailas, Zehra Sura, Software/Hardware Co-managed Cache Optimizations, IBM Research Report RC23998, July 2006.
  
  
• Krishnan Kailas, Bao Trinh and Ashok Agrawala, Temporal accuracy and modern high performance processors: A case study using Pentium Pro, UMIACS-TR-97-60, August 1997.
  
  
• Krishnan Kailas, Ashok Agrawala, S. V. Raghavan, A Generic Architecture for Programmable Traffic Shaper for High Speed Networks., UMIACS-TR-95-75, July 1995.
  
  

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